This invention relates to methods of fabricating attenuated phase shift masks.
In semiconductor manufacturing, photolithography is typically used in the formation of integrated circuits on a semiconductor wafer. During a lithographic process, a form of radiant energy such as ultraviolet light is passed through a mask/reticle and onto the semiconductor wafer. The mask contains light restricting regions (for example totally opaque or attenuated/half-tone) and light transmissive regions (for example totally transparent) formed in a predetermined pattern. A grating pattern, for example, may be used to define parallel-spaced conductive lines on a semiconductor wafer. The wafer is provided with a layer of photosensitive resist material commonly referred to as photoresist. Ultraviolet light passed through the mask onto the layer of photoresist transfers the mask pattern therein. The resist is then developed to remove either the exposed portions of resist for a positive resist or the unexposed portions of the resist for a negative resist. The remaining patterned resist can then be used as a mask on the wafer during a subsequent semiconductor fabrication step, such as ion implantation or etching relative to layers on the wafer beneath the resist.
Advances in semiconductor integrated circuit performance have typically been accompanied by a simultaneous decrease in integrated circuit device dimensions and in the dimensions of conductor elements which connect those integrated circuit devices. The wavelength of coherent light employed in photolithographic processes by which integrated circuit devices and conductors are formed has typically desirably been smaller than the minimum dimensions within the reticle or mask through which those integrated circuit devices and elements are printed. At some point, the dimension of the smallest feature opening within the reticle approaches the wavelength of coherent light to be employed. Unfortunately, the resolution, exposure latitude and depth of focus in using such reticles and light decreases due to aberrational effects of coherent light passing through openings of width similar to the wavelength of the coherent light. Accordingly as semiconductor technology has advanced, there has traditionally been a corresponding is decrease in wavelength of light employed in printing the features of circuitry.
One approach for providing high resolution printed integrated circuit devices of dimensions similar to the wavelength of coherent light utilized employs phase shift masks or reticles. In comparison with conventional reticles, phase shift masks typically incorporate thicker or thinner transparent regions within the conventional chrome metal-on-glass reticle construction. These shifter regions are designed to produce a thickness related to the wavelength of coherent light passing through the phase shift mask. Specifically, coherent light rays passing through the transparent substrate and the shifter regions have different optical path lengths, and thus emerge from those surfaces with different phases. By providing transparent shifter regions to occupy alternating light transmitting regions of the patterned metal layer of a conventional phase shift mask of the Levenson type, adjacent bright areas are formed preferably 180xc2x0 out-of-phase with one another. The interference effects of the coherent light rays of different phase provided by a phase shift mask form a higher resolution image when projected onto a semiconductor substrate, with accordingly a greater depth of focus and greater exposure latitude.
Another type of phase shift mask is referred to as an attenuated or half-tone phase shift mask. The attenuated phase shift mask has formed upon a transparent substrate a patterned semitransparent shifter layer. Such is typically formed of an oxidized metal layer which provides a 180xc2x0 phase shift to the coherent light rays utilized with the mask, and produces a light transmissivity in a range of from 4% to 30%.
A conventional typical prior art fabrication process for forming an attenuated phase shift mask and problems associated therewith are described with reference to FIGS. 1-8. FIGS. 1 and 2 depict a phase shift mask 10 comprising a transparent substrate 12, such as glass or other fused silica. A first light shielding layer 14 is formed over transparent substrate 12 and comprises a semi-transparent shifter material, such as MoSixNyOz. An example deposition thickness for layer 14 is 950 Angstroms. A second light shielding layer, typically opaque, is formed over and on first light shielding layer 16. An example thickness for layer 16 is 1000 Angstroms. Layer 16 might comprise one or more layers. For example, one common composition for layer 16 comprises an inner or base layer of CrOxNy and an outer layer of CrNx. Finally, a photoresist layer 18 is formed over and on layer 16.
Referring to FIGS. 3 and 4, photoresist layer 18 is patterned to form a circuitry pattern area 20 and a no-circuitry area 22 thereabout. Photoresist layer 18 is further patterned to define an exemplary desired circuit pattern 24 in the illustrated form of five conductive lines within area 20, and is also patterned to form an alignment marking 25 in no-circuitry frame area 22. Etching of layer 16 has been conducted largely selective relative to photoresist layer 18 and the MoSixNyOz layer as shown. An example chemistry is a wet chemistry of ceric ammonium nitrate [Ce(NH4)2(NO3)6], and an example dry chemistry (preferred) would be chlorine and oxygen based (i.e., Cl2, O2 and a carrier gas). Such chemistries can be used to etch both CrOxNy and CrNx substantially selectively relative to both photoresist and MoSixNyOz.
Referring to FIG. 5, photoresist layer 18 (not shown) has been stripped.
Referred to FIGS. 6, layer 16 is utilized as a hard mask and etching of MoSixNyOz layer 14 is conducted substantially selective relative to layer 16. An example chemistry is a dry plasma chemistry using SF6 and He. Thus, the mask pattern of photoresist layer 18 in FIG. 4 is transferred to the semitransparent shifter material 14.
Referred to FIG. 7, a photoresist layer 26 is deposited and patterned to mask the entirety of frame region 22 while leaving the substantial portion of circuitry pattern area 20 outwardly exposed.
Referring to FIG. 8 and with photoresist layer 26 in place (not shown in FIG. 8), exposed material 16 within circuitry pattern area 20 is removed substantially selectively relative to the underlying MoSixNyOz layer, for example utilizing the chemistry first described above.
One drawback with this particular processing is that the etch selectivity of removing the chromium material(s) of layer 16 relative to the MoSixNyOz is not as selective as would be desired. This results in a reduced degree of anisotropy in the etch which increases the size of the openings between the circuitry elements, thereby undesirably increasing the critical dimension (CD) between components. Accordingly, it would be desirable to eliminate or substantially reduce this problem in the fabrication of an attenuated phase shift mask. While the invention was motivated by this objective, the invention is in no way so limited, with the invention being limited only by the accompanying claims appropriately interpreted in accordance with the Doctrine of Equivalents.
The invention comprises methods of fabricating attenuated phase shift masks. In but one implementation, a method of fabricating an attenuated phase shift mask having a circuitry pattern area and a no-circuitry area includes providing a transparent substrate. A first light shielding layer is formed over the transparent substrate. The first light shielding layer comprises a semi-transparent shifter material. A second light shielding layer is formed over the first light shielding layer. At least some of the second light shielding layer material is removed from the circuitry pattern area prior to forming a circuitry pattern in a photoresist layer in the circuitry pattern area. In one implementation, the first light shielding layer is etched within the circuitry pattern area without using the second light shielding layer as a mask within the circuitry pattern area during the etching. In one implementation, the first light shielding layer is etched within the circuitry pattern area to define a desired circuitry pattern while a photoresist layer masks some of the first light shielding layer within the circuitry pattern area. Other implementations are contemplated.